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标 题: The Design and Evaluation of Hierarchical Multi-level Parallelisms for H.2 64 Encoder on Multi-core Architecture
作 者: Haitao Wei, Junqing Yu, Jiang Li
会议 / 期刊: Computer Science and Information System, 2010, 7(1):189~200 (SCI和EI 收录)
发 表 时 间: 2010年
下 载 地 址: 点击下载
论文摘要
As a video coding standard, H.264 achieves high compress rate while keeping good fidelity. But it requires more intensive computa
tion than before to get such high coding performance. A Hierarchical Multi-level Parallelisms (HMLP) framework for H.264 encoder
is proposed which integrates four level parallelisms – frame-level, slice-level, macroblock-level and data-level into one implem
entation. Each level parallelism is designed in a hierarchical parallel framework and mapped onto the multi-cores and SIMD units
on multi-core architecture. According to the analysis of coding performance on each level parallelism, we propose a method to com
bine different parallel levels to attain a good compromise between high speedup and low bit-rate. The experimental results show t
hat for CIF format video, our method achieves the speedup of 33.57x-42.3x with 1.04x-1.08x bit-rate increasing on 8-core Intel Xe
on processor with SIMD Technology.

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